This is *not* specific to PCI. The problem is caused by the presence of other bus masters besides the CPU. *Any* DMA, PCI or not, causes these problems. If the I/O is done with inw/outw in a loop, then of course this can be interrupted. What's more interesting: even if the loop is done with rep ins/rep outs (a single instruction to the CPU), it can also be interrupted.
(Disclaimer: It's a long time since I last looked into this. I'm writing the next two paragraphs from blurry memory, so I might be dead wrong. Anyone who really wants to know should pick up a good book on PCI, rather than rely on my drivel :-))
AFAIK, PCI DMA happens in units of "bursts" (packets of words). Between bursts, the bus is released so other busmasters (such as the CPU) get a chance to acquire the bus. Obviously longer bursts lead to faster DMA throughput (since there are less bus release/reacquire cycles), but they also increase the maximum jitter.
The burst length is defined by the PCI device that does the DMA, so different devices may introduce different jitter. Some devices may allow the burst length to be configured in the device's config space, but this feature is seldom used, so be prepared to encounter many devices that don't support it.
In short: you can't tell the jitter introduced by DMA unless you know your hardware very well. So, for real-time stuff, it's better to turn it off. If you do need DMA, adjust with special care the I/O latency (the length of the bursts) and the priority given to each bustmaster. We can't stress it more, you must know all your hardware to do that.
(from the mailinglist: Robert Kaiser)